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Blocking, polled USART0 driver with comptime baud rate selection (normal or U2X0, whichever has the lower error), configurable parity and stop bits (default 8N1), and a uart_echo example. Reads use an out parameter because functions returning an error union with a non-void payload don't compile for AVR yet (ziglang/zig#37099). For the same reason there are no std.Io interfaces or std.log support yet.
Grazfather
reviewed
Oct 8, 2026
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| //! SPI host for the ATmega328P (polling). | |||
| //! | |||
| //! SCK is PB5, HODI is PB3 and HIDO is PB4. PB2 is the peripheral's own SS | |||
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We use MOSI/MISO nomenclature in mz.
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Done, renamed to MOSI/MISO in the HAL, the board docs and the RF-Nano pin map.
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Adds a polled SPI host HAL for the ATmega328P (
hals/atmega328p/spi.zig) and an example that reads the nRF24L01+ STATUS and CONFIG registers on the Emakefun RF-Nano V3.0.Part of #1069. Depends on #1070 (the example prints over the UART); this branch includes its commits, and I'll rebase once it's merged.
spi_setup(only the CPU clock, since the pins are fixed) and the application passes the SCK frequency, CPOL/CPHA and bit order toapply.applysets SCK, HODI and PB2 (the hardware SS) as outputs, since an SS input pulled low would switch the SPI into device mode. Chip select is left to the caller.write_blocking,read_blockingandtransceive_blockingreturnvoidand need exclusive access to the peripheral: they don't report write collisions (WCOL), and there are no timeouts yet since the port has no time source.The generated
peripherals.SPIcan't be used directly: it's a pointer to address 0 (notallowzero) with absolute register offsets (#1072). The HAL points at each register through the generated types instead.Tested on an RF-Nano V3.0: reading the radio returns STATUS=0x0E and CONFIG=0x08, its reset values, after both a warm and a cold start.